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AT28C17
Features
* * * * * * * * * *
Fast Read Access Time - 150 ns Fast Byte Write - 200 s or 1 ms Self-Timed Byte Write Cycle Internal Address and Data Latches Internal Control Timer Automatic Clear Before Write Direct Microprocessor Control DATA POLLING READY/BUSY Open Drain Output Low Power 30 mA Active Current 100 a CMOS Standby Current High Reliability Endurance: 104 or 105 Cycles Data Retention: 10 Years 5V 10% Supply CMOS & TTL Compatible Inputs and Outputs JEDEC Approved Byte Wide Pinout Commercial and Industrial Temperature Ranges
16K (2K x 8) CMOS E2PROM
Description
The AT28C17 is a low-power, high-performance Electrically Erasable and Programmable Read Only Memory with easy to use features. The AT28C17 is a 16K memory organized as 2,048 words by 8 bits. The device is manufactured with Atmel's reliable nonvolatile CMOS technology. (continued)
Pin Configurations
Pin Name A0 - A10 CE OE WE I/O0 - I/O7 RDY/BUSY NC DC Function Addresses Chip Enable Output Enable Write Enable
AT28C17
Data Inputs/Outputs Ready/Busy Output No Connect Don't Connect
PDIP, SOIC Top View
PLCC Top View
Note: PLCC package pins 1 and 17 are DON'T CONNECT.
0541A
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Description (Continued)
The AT28C17 is accessed like a static RAM for the read or write cycles without the need of external components. During a byte write, the address and data are latched internally, freeing the microprocessor address and data bus for other operations. Following the initiation of a write cycle, the device will go to a busy state and automatically clear and write the latched data using an internal control timer. The device includes two methods for detecting the end of a write cycle, level detection of RDY/BUSY and DATA POLLING of I/O7. Once the end of a write cycle has been detected, a new access for a read or a write can begin. The CMOS technology offers fast access times of 150 ns at low power dissipation. When the chip is deselected the standby current is less than 100 A. Atmel's 28C17 has additional features to ensure high quality and manufacturability. The device utilizes error correction internally for extended endurance and for improved data retention characteristics. An extra 32-bytes of E2PROM are available for device identification or tracking.
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias................. -55C to +125C Storage Temperature...................... -65C to +150C All Input Voltages (including NC Pins) with Respect to Ground ................... -0.6V to +6.25V All Output Voltages with Respect to Ground .............-0.6V to VCC + 0.6V Voltage on OE and A9 with Respect to Ground ................... -0.6V to +13.5V
*NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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AT28C17
AT28C17
Device Operation
READ: The AT28C17 is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in a high impedance state whenever CE or OE is high. This dual line control gives designers increased flexibility in preventing bus contention. BYTE WRITE: Writing data into the AT28C17 is similar to writing into a Static RAM. A low pulse on the WE or CE input with OE high and CE or WE low (respectively) initiates a byte write. The address location is latched on the last falling edge of WE (or CE); the new data is latched on the first rising edge. Internally, the device performs a selfclear before write. Once a byte write has been started, it will automatically time itself to completion. Once a programming operation has been initiated and for the duration of tWC, a read operation will effectively be a polling operation. FAST BYTE WRITE: The AT28C17E offers a byte write time of 200 s maximum. This feature allows the entire device to be rewritten in 0.4 seconds. READY/BUSY: Pin 1 is an open drain READY/BUSY output that can be used to detect the end of a write cycle. RDY/BUSY is actively pulled low during the write cycle and is released at the completion of the write. The open drain connection allows for OR-tying of several devices to the same RDY/BUSY line. DATA POLLING: The AT28C17 provides DATA POLLING to signal the completion of a write cycle. During a write cycle, an attempted read of the data being written results in the complement of that data for I/O7 (the other outputs are indeterminate). When the write cycle is finished, true data appears on all outputs. WRITE PROTECTION: Inadvertent writes to the device are protected against in the following ways. (a) VCC sense-- if VCC is below 3.8V (typical) the write function is inhibited. (b) VCC power on delay-- once VCC h a s reached 3.8V the device will automatically time out 5 ms (typical) before allowing a byte write. (c) Write Inhibit-- holding any one of OE low, CE high or WE high inhibits byte write cycles. CHIP CLEAR: The contents of the entire memory of the AT28C17 may be set to the high state by the CHIP CLEAR operation. By setting CE low and OE to 12 volts, the chip is cleared when a 10 msec low pulse is applied to WE. DEVICE IDENTIFICATION: A n e x t r a 3 2 - b y t e s o f E2PROM memory are available to the user for device identification. By raising A9 to 12 0.5V and using address locations 7E0H to 7FFH the additional bytes may be written to or read from in the same manner as the regular memory array.
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DC and AC Operating Range
AT28C17-15 Operating Temperature (Case) VCC Power Supply Com. Ind. 0C - 70C -40C - 85C 5V 10%
Operating Modes
Mode Read Write
(2)
CE VIL VIL VIH X X X VIL
OE VIL VIH X
(1)
WE VIH VIL X VIH X X VIL
I/O DOUT DIN High Z
Standby/Write Inhibit Write Inhibit Write Inhibit Output Disable Chip Erase
X VIL VIH VH
(3)
High Z High Z
Notes: 1. X can be VIL or VIH. 2. Refer to AC Programming Waveforms.
3. VH = 12.0V 0.5V.
DC Characteristics
Symbol ILI ILO ISB1 ISB2 ICC VIL VIH VOL VOH Parameter Input Load Current Output Leakage Current VCC Standby Current CMOS VCC Standby Current TTL VCC Active Current AC Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage IOL = 2.1 mA = 4.0 for RDY/BUSY IOH = -400 A 2.4 2.0 .4 Condition VIN = 0V to VCC + 1V VI/O = 0V to VCC CE = VCC - 0.3V to VCC + 1.0V CE = 2.0V to VCC + 1.0V f = 5 MHz; IOUT = 0 mA CE = VIL Com. Ind. Com. Ind. Min Max 10 10 100 2 3 30 45 0.8 Units A A A mA mA mA mA V V V V
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AT28C17
AT28C17
AC Read Characteristics
AT28C17-15 Symbol tACC tCE tOE tDF tOH
(1) (2) (3, 4)
Parameter Address to Output Delay CE to Output Delay OE to Output Delay CE or OE High to Output Float Output Hold from OE, CE or Address, whichever occurred first
Min
Max
Units ns ns ns ns ns
150 150 10 0 0 70 50
AC Read Waveforms (1, 2, 3, 4)
Notes: 1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change without impact on tACC.
3. tDF is specified from OE or CE whichever occurs first (CL = 5 pF). 4. This parameter is characterized and is not 100% tested.
Input Test Waveforms and Measurement Level
Output Test Load
tR, tF < 20 ns
Pin Capacitance (f = 1 MHz, T = 25C) (1)
Typ CIN COUT
Note:
Max 6 12
Units pF pF
Conditions VIN = 0V VOUT = 0V
4 8
1. This parameter is characterized and is not 100% tested.
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AC Write Characteristics
Symbol tAS, tOES tAH tWP tDS tDH, tOEH tCS, tCH tDB tWC Parameter Address, OE Set-up Time Address Hold Time Write Pulse Width (WE or CE) Data Set-up Time Data, OE Hold Time CE to WE and WE to CE Set-up and Hold Time Time to Device Busy Write Cycle Time AT28C17 AT28C17E 0.5 100 Min 10 50 100 50 10 0 50 1.0 200 1000 Typ Max Units ns ns ns ns ns ns ns ms s
AC Write Waveforms
WE Controlled
CE Controlled
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AT28C17
AT28C17
Data Polling Characteristics (1)
Symbol tDH tOEH tOE tWR Parameter Data Hold Time OE Hold Time OE to Output Delay
(2)
Min 10 10 0
Typ
Max
Units ns ns ns ns
Write Recovery Time
Notes: 1. These parameters are characterized and not 100% tested. 2. See AC Read Characteristics.
Data Polling Waveforms
Chip Erase Waveforms
tS = tH = 1 sec (min.) tW = 10 msec (min.) VH = 12.0V 0.5V
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AT28C17
AT28C17
Ordering Information (1)
tACC (ns) 150 ICC (mA) Active 30 Standby 0.1 AT28C17(E)-15JC AT28C17(E)-15PC AT28C17(E)-15SC AT28C17(E)-15JI AT28C17(E)-15PI AT28C17(E)-15SI AT28C17-W Ordering Code Package 32J 28P6 28S 32J 28P6 28S DIE Operation Range Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C)
45
0.1
250
30
0.1
Notes: 1. See Valid Part Number table below. 2. The 28C17 200 ns and 250 ns speed selections have been removed from valid selections table and are replaced by the faster 150 ns TAA offering. 3. The 28C17 ceramic and LCC package offerings have been removed. New designs should utilize the 28C256 ceramic offerings.
Valid Part Numbers
The following table lists standard Atmel products that can be ordered. Device Numbers
AT28C17 AT28C17E AT28C17
Speed 15 15 -
Package and Temperature Combinations
JC, JI, PC, PI, SC, SI JC, JI, PC, PI, SC, SI W
Package Type
32J 28P6 28S W
32 Lead, Plastic J-Leaded Chip Carrier (PLCC) 28 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 28 Lead, 0.300" Wide, Plastic Gull Wing, Small Outline (SOIC) Die
Options
Blank E
Standard Device: Endurance = 10K Write Cycles; Write Time = 1 ms High Endurance Option: Endurance = 100K Write Cycles; Write Time = 200 s
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